When building code for both ARM and Thumb states, which tool decides for each function call whether to use a BL or BLX instruction?

In the CPSR, 1=0 and F=1. Which of the following is TRUE in this case?

If a 16-bit Thumb instruction causes a Data Abort, which instruction would return from the handler to the instruction after the one that caused the data abort?

A message passing system between two CPUs is implemented using data stored in a shared area of memory. To pass a message, the first CPU executes the instructions:

The second CPU receives the message using the instructions:

On both CPUs, r1 = 0x5000 and r2 = 0x6000. At which of the points A, B, C and D must Data Memory Barrier (DMB) instructions be placed in order to ensure messages are passed reliably and efficiently?

Using a Generic Interrupt Controller (GIC), when the interrupt handler writes to the End of Interrupt Register (ICCEOIR), which of the following state transitions might occur for that interrupt ID?

In an ARMv7 processor that includes the Advanced SIMD (NEON) extension, how many single precision floating point values can be stored in the Q0 register?

In an ARMv7-A system, the following C function calculates a simple checksum for an input data packet of variable length. The checksum is defined to be the sum of all of the 16-bit data items in the packet modulo 65536. The parameter data_items contains the number of 2-byte data items in the packet, and it cannot be zero by design.

When using an ARM compiler, which TWO of the following optimizations could improve the performance of this code? (Choose two)

For Cortex-A series cores, what instruction(s) are recommended to implement a mutex or semaphore?

Which of these processors is only available as a single core configuration?

In Thumb state an ARMv7-A processor can execute: