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ARM Accredited Engineer

Last Update 12 hours ago Total Questions : 210

The ARM Accredited Engineer content is now fully updated, with all current exam questions added 12 hours ago. Deciding to include EN0-001 practice exam questions in your study plan goes far beyond basic test preparation.

You'll find that our EN0-001 exam questions frequently feature detailed scenarios and practical problem-solving exercises that directly mirror industry challenges. Engaging with these EN0-001 sample sets allows you to effectively manage your time and pace yourself, giving you the ability to finish any ARM Accredited Engineer practice test comfortably within the allotted time.

Question # 51

In a multi-processor system, there are four processors numbered 0, 1, 2 and 3. The state of the processors is as follows:

    CPU 0 and 1 are sleeping in low-power state following a WFI instruction. . CPU 2 is executing program code.

    CPU 3 is sleeping in low-power state following a WFE instruction.

CPU 2 executes a SEV instruction. What is the effect on the system?

A.

CPU 0: executing, CPU 1: executing, CPU 2: executing. CPU 3: executing

B.

CPU 0: executing, CPU 1: executing. CPU 2: executing. CPU 3: sleeping

C.

CPU 0: sleeping, CPU 1: sleeping. CPU 2: executing. CPU 3: executing

D.

CPU 0: sleeping, CPU 1: sleeping. CPU 2: sleeping, CPU 3: executing

Question # 52

The following ARM instruction can be used to return from an exception:

movs pc, lr

Apart from the program counter, which register is updated by this instruction?

A.

Ir

B.

r0

C.

CPSR

D.

SCTLR

Question # 53

An undefined instruction will cause an Undefined Instruction exception to be taken when:

A.

It is fetched.

B.

It is decoded.

C.

It is executed.

D.

It writes back its results.

Question # 54

An external debugger would need to clean the contents of the processor data cache in which of the following cases?

A.

When it changes the contents of ARM registers (r0-r15)

B.

When it displays the contents of an area of cacheable data

C.

When it displays the contents of an area of cacheable code

D.

When it sets a software breakpoint

Question # 55

To ensure optimum efficiency when programming in C, what is the recommended maximum number of arguments to be passed to a function?

A.

1

B.

4

C.

7

D.

8

Question # 56

LDREX and STREX were introduced in which ARM architecture version?

A.

ARMv5TE

B.

ARMv6

C.

ARMv6K

D.

ARMv7

Question # 57

When using the ARM Compiler (armcc), which of the following possible keywords can be used to remove padding bytes from a structure?

A.

__package

B.

__packed

C.

__compact

D.

__compress

Question # 58

Using a lower optimization level when compiling will:

A.

Produce faster code.

B.

Produce smaller code.

C.

Produce non standard-compliant code.

D.

Produce code that might be easier to debug.

Question # 59

The ARMv7-A virtual memory management system supports 32-bit (short) and 64-bit (long) page table descriptors. The sizes of a small page in a short descriptor and a small page in a long descriptor are:

A.

1 KB and 4KB respectively

B.

4KB and 4KB respectively

C.

4KB and 16KB respectively

D.

16KB and 16KB respectively

Question # 60

Under which of the following circumstances would a DSB instruction be used?

A.

In a multi-threaded system, when two threads need to be synchronized at a particular point

B.

When accessing a peripheral, it is necessary to halt until the memory access is complete

C.

When it is necessary to temporarily disable interrupts while carrying out a particular memory access

D.

In a multiprocessor system, when it is necessary to halt one of the cores while the other completes a critical task

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